• 1
• 0
• 0

wolver / ee260_lab

• 1
• 0
• 0

wolver / verilog-pipeline-processor

• 1
• 0
• 25

wolver / yanfuti_icc2_block forked from Yanfuti / yanfuti_icc2_block

Open lab for Synopsys ICC2 block level implementation : from floorplan to chipfinish

• 1
• 0
• 0

wolver / FUDAN-Digital-Logic-2024-SXG

• 1
• 0
• 0

wolver / FDU-arch-H--2025-labs

• 1
• 0
• 0

wolver / 9e3cb

• 1
• 0
• 0

wolver / DCC_Basic

• 1
• 0
• 0

wolver / ToolChain

• 1
• 0
• 0

wolver / SoC-RISCV

• 1
• 0
• 0

wolver / MPSoC-RISCV

• 1
• 0
• 0

wolver / nox

• 1
• 0
• 0

wolver / axi

• 1
• 0
• 0

wolver / Vivado-Design-Tutorials

• 1
• 0
• 0

wolver / zqh_riscv

• 1
• 1
• 0

wolver / OpenNoC

• 1
• 0
• 0

wolver / ChiPFormer

• 1
• 0
• 0

wolver / riscv-gnu-toolchain

• 1
• 0
• 1

wolver / awesome_ai4eda forked from 宫艺心 / awesome_ai4eda

ai4eda方向相关学习资源

• 1
• 0
• 1

wolver / llm-ReAct forked from 高艳鹏 / llm-ReAct

https://github.com/OceanPresentChao/llm-ReAct.git

• 1
• 0
• 0

wolver / RuView